MediaTek is no longer putting all its silicon eggs in one basket. The company is now using Intel’s EMIB (Embedded Multi-Die Interconnect Bridge) packaging technology alongside TSMC’s CoWoS and SoIC services for its AI ASIC and data center chip designs.

The move is a pragmatic response to a simple problem: TSMC’s advanced packaging capacity is stretched thin, and MediaTek needs options. When the world’s most important chip foundry is heavily allocated to high-volume clients like Nvidia, even a major customer has to get creative.

Why MediaTek is shopping around

MediaTek has deep roots in the Google TPU ecosystem, contributing to designs like the TPU 8t built on TSMC’s N3P process with CoWoS-S packaging. But relying solely on TSMC for packaging when supply is constrained is a vulnerability, not a strategy.

Intel’s EMIB takes a fundamentally different approach to connecting multiple chiplets inside a single package. Instead of using a large silicon interposer like CoWoS, EMIB embeds small bridge chips directly into the package substrate.

Intel’s EMIB is projected to enable larger package scalability targeting 8-12x reticle size by 2026-2027. For comparison, CoWoS-S currently supports roughly 3.3x reticle size. The technology also reportedly offers improved yield, reduced warpage, and lower costs for certain chip designs, benefits that are particularly relevant for inference-type ASICs, which have different performance and cost profiles compared to the massive training GPUs that dominate TSMC’s CoWoS allocation.

The talent play behind the strategy

Around early May 2026, MediaTek hired Douglas Yu, a former TSMC executive who spent years leading R&D and advanced packaging efforts at the foundry giant. MediaTek has denied any direct collaboration with Intel following the hire.

What this means for investors

MediaTek is targeting roughly 26% of the AI ASIC market by 2028, which would translate to approximately 5 million units. Google is the obvious anchor customer through the TPU program.

Reports suggest Meta has also shown interest in Intel’s EMIB for its own accelerated chip designs.

For Intel, this is a meaningful validation of its foundry services business. The broader takeaway for the semiconductor industry is that advanced packaging has become a strategic chokepoint, and companies that can access multiple packaging technologies have a structural advantage in a market where AI chip demand consistently outstrips the ability to actually assemble and package those chips.