Meta plans to manufacture Iris AI chip in September, doubling compute capacity by 2027

Meta plans to manufacture Iris AI chip in September, doubling compute capacity by 2027

The social media giant's in-house silicon push could reshape the AI chip market and shift billions in semiconductor spending

Meta is pushing forward with plans to manufacture its next-generation AI chip, codenamed “Iris,” as part of an aggressive buildout. The move represents one of the most ambitious in-house silicon plays in Big Tech, placing Meta alongside Apple, Google, and Amazon in the growing club of companies that decided buying chips from Nvidia wasn’t enough.

The chip roadmap taking shape

Iris is the codename for Meta’s MTIA 400, the fourth generation in its Meta Training and Inference Accelerator series. By March 2026, the chip had already completed lab testing, clearing a critical milestone on its path to data center deployment.

Meta’s predecessor chip, the MTIA 300, is already in production. The company has mapped out four new chip generations, spanning MTIA 300 through MTIA 500, all slated for deployment by the end of 2027, a cadence approximating a new chip generation roughly every six months.

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The performance numbers across these generations are notable. Meta is targeting a 25x increase in compute FLOPS and a 4.5x improvement in high-bandwidth memory (HBM) bandwidth.

These aren’t training chips designed to build the next frontier model from scratch. Their primary focus is inference workloads. Think ranking your social media feed, powering recommendation engines, and handling generative AI responses.

Who’s actually building these chips

Meta designs the chips, but fabrication falls to TSMC. Broadcom is collaborating on the design side. TSMC and Broadcom benefit directly from the partnership, securing long-term manufacturing and design contracts.

Meta’s silicon ambitions don’t mean it’s cutting ties with the semiconductor supply chain. Its broader capital expenditure plans also reflect significant acquisitions from Nvidia and AMD, suggesting a hybrid methodology incorporating both custom silicon and existing GPU technologies.

What this means for investors

For semiconductor investors, Meta’s chip strategy creates a complex picture. The broader trend of hyperscalers building custom silicon puts pressure on merchant chip companies that have historically sold standardized products at premium margins. Google has its TPUs. Amazon has Trainium and Inferentia. Now Meta is scaling MTIA aggressively.

The six-month release cadence Meta is targeting is also worth watching closely. Semiconductor development cycles typically run 18 to 24 months. Compressing that timeline requires enormous engineering investment and carries meaningful execution risk.

Disclosure: This article was edited by Editorial Team. For more information on how we create and review content, see our Editorial Policy.

Meta plans to manufacture Iris AI chip in September, doubling compute capacity by 2027

Meta plans to manufacture Iris AI chip in September, doubling compute capacity by 2027

The social media giant's in-house silicon push could reshape the AI chip market and shift billions in semiconductor spending

Meta is pushing forward with plans to manufacture its next-generation AI chip, codenamed “Iris,” as part of an aggressive buildout. The move represents one of the most ambitious in-house silicon plays in Big Tech, placing Meta alongside Apple, Google, and Amazon in the growing club of companies that decided buying chips from Nvidia wasn’t enough.

The chip roadmap taking shape

Iris is the codename for Meta’s MTIA 400, the fourth generation in its Meta Training and Inference Accelerator series. By March 2026, the chip had already completed lab testing, clearing a critical milestone on its path to data center deployment.

Meta’s predecessor chip, the MTIA 300, is already in production. The company has mapped out four new chip generations, spanning MTIA 300 through MTIA 500, all slated for deployment by the end of 2027, a cadence approximating a new chip generation roughly every six months.

Advertisement

The performance numbers across these generations are notable. Meta is targeting a 25x increase in compute FLOPS and a 4.5x improvement in high-bandwidth memory (HBM) bandwidth.

These aren’t training chips designed to build the next frontier model from scratch. Their primary focus is inference workloads. Think ranking your social media feed, powering recommendation engines, and handling generative AI responses.

Who’s actually building these chips

Meta designs the chips, but fabrication falls to TSMC. Broadcom is collaborating on the design side. TSMC and Broadcom benefit directly from the partnership, securing long-term manufacturing and design contracts.

Meta’s silicon ambitions don’t mean it’s cutting ties with the semiconductor supply chain. Its broader capital expenditure plans also reflect significant acquisitions from Nvidia and AMD, suggesting a hybrid methodology incorporating both custom silicon and existing GPU technologies.

What this means for investors

For semiconductor investors, Meta’s chip strategy creates a complex picture. The broader trend of hyperscalers building custom silicon puts pressure on merchant chip companies that have historically sold standardized products at premium margins. Google has its TPUs. Amazon has Trainium and Inferentia. Now Meta is scaling MTIA aggressively.

The six-month release cadence Meta is targeting is also worth watching closely. Semiconductor development cycles typically run 18 to 24 months. Compressing that timeline requires enormous engineering investment and carries meaningful execution risk.

Disclosure: This article was edited by Editorial Team. For more information on how we create and review content, see our Editorial Policy.