Google unveils TPU 8tx for secure computing and TPU 8i Max for inference

Google has introduced two new members of its eighth-generation Tensor Processing Unit family: the TPU 8tx, built for large-scale training, and the TPU 8i Max, aimed at low-latency inference.

The chips were unveiled on November 9, 2026. They signal that Google’s custom silicon strategy is getting more specific, not more general.

Investors seemed to like the direction. Alphabet shares rose more than 2% in premarket trading after the announcement.

What Google actually announced

Neither chip is a clean-sheet design. Both are reconfigurations of processors Google had already put on the table: the training-focused TPU 8t and the inference-optimized TPU 8i.

The TPU 8tx is the variant with a security badge. It is designed for confidential computing workloads, with government agencies and regulated industries as its target customers.

To get there, Google worked with AMD on hardware-level encryption. Data protection is handled at the chip level itself, rather than relying solely on software layers stacked on top.

The TPU 8i Max goes after a different problem. It is tuned for AI applications that work with long context windows, meaning models that need to hold a lot of information in view at once.

Google says the Max variant brings increased compute density and improved memory bandwidth.

The foundation these chips are built on

The base TPU 8t was announced on April 22, 2026. Google pitched it as delivering nearly 3x the compute performance per pod compared with the previous Ironwood generation.

A TPU 8t superpod can stretch to 9,600 chips and reach 121 ExaFlops of performance, backed by 2 PB of shared high-bandwidth memory (HBM).

The TPU 8i sits on the inference side of the house. Its pods scale to 1,152 chips and deliver 11.6 Exaflops.

It also carries 384 MB of on-chip SRAM, a higher allotment than training chips typically prioritize. SRAM is the fastest, closest memory a processor can reach, so more of it helps cut the waiting time that slows down real-time responses.

The split between training and inference silicon is itself the story here. Training is the expensive, months-long process of teaching a model, while inference is the moment-to-moment work of answering user requests.

The two jobs have different needs. Training rewards raw throughput across thousands of chips, while inference rewards speed, memory access, and cost per answer.

Why specialization is the play

The TPU 8tx and TPU 8i Max reflect a wager that customers will pay for hardware matched to what they actually run. A government agency training models on classified data has different priorities than a startup serving a long-context assistant to millions of users.

The AMD partnership is worth noting on its own. Two companies that often appear on opposite sides of chip competition found a reason to cooperate on encryption, which suggests confidential computing is becoming table stakes for winning certain contracts.

What this means for the AI infrastructure race

The most direct implication is competitive. Custom chips like TPUs give Google an alternative to relying entirely on third-party accelerators, and specialized variants could help Google Cloud court enterprise clients that have leaned on Nvidia hardware.

The more than 2% premarket move in Alphabet stock suggests the market reads the announcement as a positive for Google’s position in AI demand.

For regulated buyers, the TPU 8tx offers something concrete to evaluate. Hardware-level encryption developed with AMD gives compliance teams a specific feature to point to, rather than a general promise of security.

For developers building long-context applications, the TPU 8i Max is the one to watch. Improved memory bandwidth and compute density could lower the cost and latency of serving models that chew through large inputs.